Field of Invention
The present invention relates to a manufacturing filed of semiconductor devices, and provides a monolithic integrated lattice mismatched crystal template and a preparation method thereof for large, low cost substrates by using low-viscosity material.
Description of Related Arts                1. The world today deduces a major turning point for optoelectronic devices transforming from discrete part to integrate part. Due to various kinds of restrictions and constraints based on the material, structure and process, optoelectronic integration needs to solve a series of essential basic scientific issues to make great strides.        
The ideal way to realize optoelectronic integration is growing different kinds of material systems on one material substrate (namely material compatibility), and integrating superior performance of all kinds of materials. For example: silicon (Si) crystal is the most common and inexpensive microelectronic material; but it cannot be used as luminescent material due to that Si is an indirect-band-gap material. While the III-V group semiconductor compound materials, i.e., gallium arsenide (GaAs), indium phosphide (InP), gallium nitride (GaN) and the like, are the most common optoelectronic materials. If the integration of silicon and III-V group material can be achieved, that is, preparing micro-electronics integrate circuit as well as preparing optoelectronic devices on one semiconductor chip, it is expected to promote the development of optoelectronic integration technology.
The modern heteroepitaxial growth techniques, including molecular beam epitaxy technology (MBE) and metal-organic chemical vapor phase epitaxy technology (MOVPE), make it possible to prepare different kinds of crystal heterostructures. Especially in the field of semiconductors, the crystal heterostructure has wide applications in information and communication technology, energy, health, entertainment, information security and daily life. However, due to various crystals have their own lattice constant, only a very limited number of compounds (unless lattice matched) can achieve epitaxial growth on a specific commercial substrate with several tens of nanometers without generating a large number of defects (the defects include dislocations, stacking faults, interface and surface undulation, etc.).
The lack of substrates with arbitrary lattice constant results in that people cannot try all possible combinations of materials, thus being forced to limit the design of device structure on the existing substrates. For example, one of the dreams of the silicon based optoelectronics field is integrating communication laser onto silicon substrate, while the best commercial InGaAsP communication laser is usually grown on InP substrate. The commercial InGaAsP communication laser has poor thermal stability, and requires an external refrigeration device to stabilize the output wavelength, thereby increasing the cost and energy consumption in production and use. The problems will be solved if the laser can be designed and grown on an In0.3Ga0.7As ternary substrate; while such a substrate does not exist on the market. Besides, InSb material has extremely high electron mobility at room temperature, and a high electron mobility transistor by using InSb channel structure may have extremely high work frequency with low power consumption. However, the major problem is still the lack of a suitable substrate. Wide-band-gap III-V material is a very hot research subject recently, and has extremely wide applications especially in high power/high temperature transistors and light-emitting devices from green to ultraviolet band. Once again, the bottleneck to improve the performance of such devices is still high-quality substrate or template with the required lattice constants.
In other applications, some functional devices consist of a plurality of heterogeneous structures with different lattice constants. For example, multi junction photovoltaic solar cell has extremely high conversion efficiency under concentrated sunlight, wherein generally each junction has its own lattice constant. Another example is vertical-cavity surface-emitting laser (VCSEL). People usually need to integrate GaAs/Al(Ga)As distributed Bragg reflector onto a lattice mismatched substrate, i.e., InP and GaSb. Therefore, the requirement of high-quality thin templates for enabling switch from one lattice constant to another lattice constant during single epitaxial growth process (monolithic) exists extensively.
The above problems are well known in the related art. In recent years, a continuous progress has been made for the improvement of the substrate template quality and the attempt for overcoming the lattice mismatch, wherein one of the most successful strategies is to change lattice constant by employing metamorphic buffer layers. Through changing elemental compositions of the polyhydric compound by step or continuously, the strategy may achieve in changing from the lattice constant identical to substrate to that being desired. Recently, a number of optoelectronic devices based on this method have been developed, such as 1.58 μm InGaAs laser on GaAs substrate [I. Tångring et al. Appl. Phys. Lett. 91, 221101 (2007)], wherein the metamorphic growth technique with gradient compounds can be used to reduce threading dislocation density to about 106 cm−2, meanwhile, cross-hatch pattern usually appears on the surface, which is not conducive to the growth of a smooth interface. Another method is “interfacial misfit dislocation (IMF) array”, that is under certain growth condition, interfacial misfit dislocation array would form at the interface between two crystals with large lattice mismatch [S. H. Huang et al. Appl. Phys. Lett. 88, 131911 (2006)], and generate a very low threading dislocation density (105 cm−2, [A. Jallipalli et al Nanoscale Res. Lett. 4, 1458 (2009)]) and a flat surface; but so far, this method is only valid for binary compounds. Another promising method is a concept of compliant substrate (CS) proposed by Lo [Y. H. Lo, Appl. Phys. Lett. 59, 2311 (1991)], wherein if the compliant substrate template is thin enough, the material layer with lattice mismatch grown on the template would not generate dislocations; if the compliant substrate template is larger than the critical thickness, the generated threading dislocations would penetrate through the compliant substrate template instead of epitaxial layer. Herein, the critical step is to create an interface (or buffer layer) between the compliant substrate template and a support layer below, such that the compliant substrate template can slide freely on the interface. There are several methods to achieve this kind of buffer layer/interface. In the U.S. Pat. No. 5,294,808 (invention title: Pseudomorphic and dislocation free heteroepitaxial structures) belonging to Lo as the inventor, the compliant substrate template consists of a very thin membrane structure or platform shaped structure, but such method needs complicated preparation process and is hard to achieve large size. While another U.S. Pat. No. 5,981,400 by inventor Lo (invention title: Compliant universal substrate for epitaxial growth) provides a more general method, that is reversing bonding, which method can deal with very lager lattice mismatch, but needs to perform bonding and etching prior to growth. Due to the bonding process is very complicated, it is difficult to achieve preparation with large size, and the residual stress and surface undulation of the thin layer are large. The U.S. Pat. No. 6,372,356 (invention title: Compliant substrates for growing lattice mismatched films) by inventors of Thorton et al. provides that an amorphous buffer layer is arranged below a compliant substrate, which is accomplished by first growing a cap layer (e.g. AlAs) followed by the process of photolithography and oxidation. Such method has been used to grow the relevant GaN heterostructures on a GaAs substrate. While in the U.S. Pat. No. 6,746,777 (invention title: Alternative substrates for epitaxial growth), the inventor Hwang employs metal-interface bonding layer, wherein such metals are solid at room temperature, and are converted to liquid at the growth temperature. Such method needs bonding and etching prior to growth. In the US patent application US2004/0140479 (invention title: Compliant substrate for a heteroepitaxial structure and method for making same), the inventor Akatsu constructs a weakened buffer layer to realize a compliant substrate by employing ion implantation. However, all abovementioned approaches need to perform external process to achieve a compliant growth condition, and cannot be repeated in the same epitaxial growth process.
There is another strategy that is first generating a plurality of dislocations to fully relax the lattice mismatched layer, then reducing defect density by new method. In the U.S. Pat. No. 6,784,074 (invention title: Defect-free semiconductor templates for epitaxial growth and method of making same), inventors Shchukin and Ledentzov provide a approach to reduce defects, which is first growing a special selection of material layer with low thermal evaporation rate, then covering a thin layer with high thermal evaporation rate, and followed by performing thermal evaporation and subsequent growth. Such method has good effect for specific materials, but more material combinations are hard to obtain.
To sum up, the above methods have its disadvantages to solve the lattice mismatch issue.